1. Field of the Invention
This invention relates to a current source unit, and more particularly is applicable to an emitter-coupled logic circuit constructing for example, a multiplier, an amplifier, or a hysteresis circuit and a differential current detecting circuit.
2. Description of the Related Art
A current source has been used as an essential component in existing various analog circuits (for example, a multiplier shown in FIG. 1 or a differential amplifier shown in FIG. 2).
Referring to FIG. 1, 1 generally shows a multiplier, including a basic configuration improved from so-called Gilbert cells, which is composed of a pair of diodes and a pair of differential common-emitter units operating in a mode of class AB.
That is, this multiplier is composed of a first and second Gilbert cells in which the first Gilbert cell includes an input stage consisting of a differential pair with diode-connected transistors Q1 and Q2 and includes an output stage consisting of a differential pair with transistors Q3 and Q4 in common-emitter connection. The second Gilbert cell includes an input stage consisting of a differential pair with diode-connected transistors Q5 and Q6 and also including an output stage consisting of a differential pair with transistors Q7 and Q8 in common-emitter connection.
In the input stage, the common emitter of the differential pair of transistors Q1, Q2 and the common emitter of the differential pair of transistors Q5, Q6 are connected to inputs P1 and P2 of a current source 2, respectively. The current source 2 pulls currents I.sub.x into the respective inputs P1 and P2.
In this configuration, the emitter areas of the transistors Q1 and Q6 are N times the emitter areas of the transistors Q5 and Q2, respectively. Therefore, the transistors Q1 and Q6 can have the emitter currents N times larger than the currents in transistors Q5 and Q2.
In the output stage, the common emitter of the differential pair of transistors Q3, Q4 and the common emitter of the differential pair of transistors Q7, Q8 are connected to current sources 3 and 4, respectively. Collectors of transistors Q3 and Q8 are directly connected to a power supply voltage Vcc. Collectors of the transistors Q7 and Q4 are connected to the power supply voltage Vcc via current mirror type of current sources 5 and 6.
Bases of the transistors Q3 and Q7, which are connected together, are connected to a common collector of the transistors Q2 and Q6 in the preceding stage, and bases of the transistors Q4 and Q8, which are connected together, are connected to a common collector of the transistors Q1 and Q5 in the preceding stage. The areas of emitters of the transistors Q3 and Q8 are N times larger than those of the transistors Q7 and Q4.
With this configuration, when a pair of differential currents I.sub.x.(1+a) and I.sub.x.(1-a), including a signal current a.I.sub.x which may be obtained by modulating the current I.sub.x with a modulation factor of "a", are given to the input stage, the output stage provides the output of a signal S1 proportional to the modulation factor "a" via a node connecting the current source 6 and the transistor Q4 together.
A differential current amplifier 7 (FIG. 2) is configured such that the bases of a pair of output transistors Q11 and Q12 are connected to outputs P3 and P4 of a current source 8, respectively.
The current source 8 is configured such that collectors of respective transistors Q9 and Q10 are connected to resistors R1 and R2 at nodes P5 and P6, and a node connecting the resistors R1 and R2 together is connected to the bases of the transistors Q9 and Q10. Furthermore, the node P5 is connected to an input P7 and the output P3 of the current source 8, and the node P6 is connected to an input P8 and the output P4 of the current source 8.
In this circuit configuration, when the inputs P7 and P8 are supplied with a pair of differential currents I.sub.0 +i and I.sub.0 -i which have superimposed signal currents i and -i, respectively, the current source 8 pulls currents I.sub.0 into each of the transistors Q9 and Q10 and exhausts these currents to a ground line GND via a common emitter. The current source 8 also makes the signal current i flow through the resistors R1 and R2.
As a result of the operation described above, potential difference is induced across the resistors R1 and R2 (that is, between the outputs P3 and P4), which allows a pair of collector currents I.sub.1 and 1I.sub.2 (=I.sub.0 +a.i, I.sub.0 -a.i) including amplified differential currents a.i to flow through the transistors Q11 and Q12, respectively. Thus, the differential current amplifier 7 operates such that it multiplies the signal current i by "a" and it outputs the resultant current.
In the case of the multiplier 1, to provide an appropriate signal output, the current source 2 should operate such that inputs P1 and P2 are maintained at appropriate DC voltages and the current source 2 pulls in the currents I.sub.x having the same value.
The most simple example possible of the current source 2 is a current mirror type of current source 9 as shown in FIG. 3.
In this current source 9, the collector currents I.sub.3 and I.sub.4 of the transistors Q13 and Q14 become approximately the same. However, this type current source has a problem that rigorous equality does not hold between the current into the input P1 and the current into the input P2 due to the fact that a portion of the current to be pulled into the input P1 is spent as a base current I.sub.B1.
On the other hand, in the case of the current source 10 shown in FIG. 4, which is obtained by modifying the current source 9 in such a manner that an emitter follower with a transistor Q15 is added to the current source 9, the currents flowing into inputs P1 and P2 can be approximately the same.
However, in the case of the current source 10, the addition of the emitter follower results in a problem that the voltage of the input P1 is increased by 2.V.sub.F (where V.sub.F is a forward voltage drop of a semiconductor p-n junction) with respect to a ground line GND, thus reduction occurs in the effective dynamic range.
To pull the currents I.sub.x into the inputs P1 and P2 by the same amount for both of the inputs P1 and P2, the voltage of the input P2 should be fixed, while the voltage of the input P2 may be an arbitrary value. Therefore, when a pair of differential currents are described by I.sub.x.(1+a) and I.sub.x.(1-a), if the modulation factor a has the form of a sinusoidal wave, then the voltage of the input P1 is fixed at 2.V.sub.F, while the voltage of the input P1 varies up and down around the 2.V.sub.F (FIG. 5). Thus, the voltage variations occur in an asymmetric fashion between the inputs P1 and P2, which leads to a slight problem associate with linearity when the current source is used in a multiplier.
On the other hand, in the case of the current source 8 for use in the differential current amplifier 7, because the bases of a pair of transistors Q9 and Q10 are connected together in common as well as the emitters, the same amount of collector currents I.sub.0 flow through each of these transistors Q9 and Q10. Therefore, when a pair of differential currents I.sub.0 +i and I.sub.0 -i are supplied via the inputs P7 and P8, respectively, the signal currents "i" flow through the resistors R1 and R2, thus resulting in the voltage difference by amount of (R1+R2).i across the resistors R1 and R2 (that is, between the outputs P3 and P4).
Due to this difference in the voltages, the differential current component appears between the collector currents I.sub.0 +a.i and I-a.i flowing through the transistors Q11 and Q12, respectively. The differential current component can be described as a function of a resistance R which is the same both for the resistances R1 and R2, a transconductance g.sub.m, and a constant V.sub.T by following equation. ##EQU1##
In this equation (1), V.sub.T can be described as V.sub.T =k.T/q, where " k" is Boltzmann's constant, "T" is the absolute temperature, and "q" is the electronic charge. Thus, "VT" becomes about 26 mV at room temperature.
As can been seen from the equation (1), to obtain a high gain in this differential current amplifier 7, it is required to use a sufficiently high resistance for the resistors R1 and R2.
However, if the resistances of resistors R1 and R2 are too high, the potentials of the outputs P3 and P4 become too high due to the base currents of the transistors Q9 and Q10 which flow through the resistances R1 and R2. This causes deviations of the operation currents of the transistors Q11 and Q12 from the current I.sub.0, which further results in a tendency that the operation current becomes more dependent on the amplification factor h.sub.FE and temperature.
Further, in a conventional emitter-coupled logic circuit structuring a hysteresis circuit and a differential current detecting circuit, the hysteresis circuit has been widely used as an effective means for avoiding unwanted phenomenon such as chattering due to noise contained in the input signal, which cannot be removed by a comparator.
As shown in FIG. 6, a hysteresis circuit 31 can be configured with an operational amplifier 32 such that noninverting input of the operational amplifier is grounded via a resistor R31, and the output signal S31 of the operational amplifier 32 is fed back as an inverting input to the operational amplifier 32 after being divided with resistors R31 and R32. This configuration gives a typical input-output characteristic as shown in FIG. 7.
In this case, the degree of the hysteresis H of the hysteresis circuit 31 can be determined by an input voltage V.sub.IN supplied to the inverting input of the operational amplifier 32 and also by the resistance of the resistors R31 and R32. For example, the voltage Va required for the hysteresis circuit 31 to rise up can be described by the following equation: ##EQU2## relative to the reference voltage (0 V in this case).
As can be seen from this equation (2), the hysteresis circuit 31 does not rise up even if the voltage level associated with the noise component exceeds the reference voltage, as long as the noise level is within a certain range described by the equation (2). Thus, it is possible to avoid chattering in the output signal due to the noise.
However, in general, when it is required to reduce the voltages in a signal processing circuit, a small degree of hysteresis is needed. Therefore, a very large ratio R32/R31 is required in the equation (2), which clearly means that a very large gain and sufficiently large amount of positive feedback are required. A complicated circuit is needed to achieve this requirement.